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| AGR09030E 30 W, 865 MHz--895 MHz, N-Channel E-Mode, Lateral MOSFET Introduction The AGR09030E is a high-voltage, gold-metalized, laterally diffused metal oxide semiconductor (LDMOS) RF power transistor suitable for cellular band, code-division multiple access (CDMA), global system for mobile communication (GSM), enhanced data for global evolution (EDGE), and time-division multiple access (TDMA) single and multicarrier class AB wireless base station amplifier applications. This device is manufactured on an advanced LDMOS technology, offering state-of-the-art performance, reliability, and thermal resistance. Packaged in an industry-standard CuW package capable of delivering a minimum output power of 30 W, it is ideally suited for today's RF power amplifier applications. Table 1. Thermal Characteristics Parameter Thermal Resistance, Junction to Case: AGR09030EU AGR09030EF Sym R R JC JC Value 1.85 2.2 Unit C/W C/W Table 2. Absolute Maximum Ratings* Parameter Drain-source Voltage Gate-source Voltage Drain Current--Continuous Total Dissipation at TC = 25 C: AGR09030EU AGR09030EF Derate Above 25 C: AGR09030EU AGR09030EF Operating Junction Temperature Storage Temperature Range Sym Value VDSS 65 VGS -0.5, +15 ID 4.25 PD PD -- -- TJ 95 80 0.54 0.45 200 Unit Vdc Vdc Adc W W W/C W/C C AGR09030EU (unflanged) AGR09030EF (flanged) Figure 1. Available Packages TSTG -65, +150 C Features Typical performance ratings are for IS-95 CDMA, pilot, sync, paging, traffic codes 8--13: -- Output power (POUT): 7 W. -- Power gain: 21 dB. -- Efficiency: 27%. -- Adjacent channel power ratio (ACPR) for 30 kHz bandwidth (BW): (750 kHz offset: -45 dBc) (1.98 MHz offset: -60 dBc). -- Input return loss: 10 dB. High-reliability, gold-metalization process. High gain, efficiency, and linearity. Integrated ESD protection. Si LDMOS. Industry-standard packages. 30 W minimum output power. * Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Table 3. ESD Rating* AGR09030E HBM MM CDM Minimum (V) 500 50 1500 Class 1B A 4 * Although electrostatic discharge (ESD) protection circuitry has been designed into this device, proper precautions must be taken to avoid exposure to ESD and electrical overstress (EOS) during all handling, assembly, and test operations. PEAK Devices Agere employs a human-body model (HBM), a machine model (MM), and a charged-device model (CDM) qualification requirement in order to determine ESD-susceptibility limits and protection design evaluation. ESD voltage thresholds are dependent on the circuit parameters used in each of the models, as defined by JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and JESD22-C101A (CDM) standards. Caution: MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. AGR09030E 30 W, 865 MHz--895 MHz, N-Channel E-Mode, Lateral MOSFET Electrical Characteristics Recommended operating conditions apply unless otherwise specified: TC = 30 C. Table 4. dc Characteristics Parameter Off Characteristics 150 Drain-source Breakdown Voltage (VGS = 0, ID = 100 A) Gate-source Leakage Current (VGS = 5 V, VDS = 0 V) Zero Gate Voltage Drain Leakage Current (VDS = 28 V, VGS = 0 V) On Characteristics Forward Transconductance (VDS = 10 V, ID = 1.0 A) Gate Threshold Voltage (VDS = 10 V, ID = 400 A) Gate Quiescent Voltage (VDS = 28 V, IDQ = 330 mA) Drain-source On-voltage (VGS = 10 V, ID = 1.0 A) Table 5. RF Characteristics Parameter Dynamic Characteristics Input Capacitance (VDS = 28 Vdc, VGS = 0, f = 1 MHz) Output Capacitance (VDS = 28 Vdc, VGS = 0, f = 1 MHz) Reverse Transfer Capacitance (VDS = 28 Vdc, VGS = 0, f = 1 MHz) CISS COSS CRSS -- -- -- 56 15.7 0.73 -- -- -- pF pF pF Symbol Min Typ Max Unit GFS VGS(TH) VGS(Q) VDS(ON) -- -- -- -- 2.2 -- 3.8 0.35 -- 5.0 -- -- S Vdc Vdc Vdc Symbol V(BR)DSS IGSS IDSS Min 65 -- -- Typ -- -- -- Max -- 0.95 50 2.9 Unit Vdc Adc Adc Functional Tests (in Supplied Test Fixture) Agere Systems Supplied Test Fixture) (Test frequencies (f) = 865 MHz, 880 MHz, 895 MHz) Linear Power Gain (VDS = 28 V, POUT = 5 W, IDQ = 330 mA) Output Power (VDS = 28 V, 1 dB compression, IDQ = 330 mA) Drain Efficiency (VDS = 28 V, POUT = P1dB, IDQ = 330 mA) Third-order Intermodulation Distortion (100 kHz spacing, VDS = 28 V, POUT = 30 WPEP, IDQ = 330 mA) Input Return Loss Ruggedness (VDS = 28 V, POUT = 30 W, IDQ = 330 mA, f = 880 MHz, VSWR = 10:1, all angles) IMD IRL -- GL P1dB 19 30 -- -- -- 21 40 57 -31 10 -- -- -- -- -- dB W % dBc dB No degradation in output power. AGR09030E 30 W, 865 MHz--895 MHz, N-Channel E-Mode, Lateral MOSFET Test Circuit Illustrations for AGR09030E VGG + C26 C14 R3 + R2 C13 C12 C11 C10 C9 C8 Z11 Z16 Z1 RF INPUT C27 Z2 Z3 C1 Z4 Z5 Z6 Z7 R1 Z15 C2 C3 Z19 C17 Z12 Z8 Z9 Z10 2 1 DUT 3 C4 C6 C5 C7 PINS: 1. DRAIN 2. GATE 3. SOURCE Z13 C16 Z17 C18 Z18 RF OUTPUT Z14 FB1 + C19 C20 C21 C22 C23 C24 C25 VDD A. Schematic Parts List: Microstrip line: Z1 0.900 in. x 0.066 in.; Z2 0.294 in. x 0.050 in.; Z3 0.123 in. x 0.066 in.; Z4 0.703 in. x 0.066 in.; Z5 0.267 in. x 0.150 in.; Z6 0.270 in. x 0.150 in.; Z7 0.050 in. x 0.440 in.; Z8 0.324 in. x 0.440 in.; Z9 0.100 in. x 0.440 in.; Z10 0.155 in. x 0.440 in.; Z11 1.024 in. x 0.050 in.; Z12 0.123 in. x 0.300 in.; Z13 0.050 in. x 0.300 in.; Z14 0.213 in. x 0.300 in.; Z15 0.393 in. x 0.100 in.; Z16 0.194 in. x 0.100 in.; Z17 0.523 in. x 0.066 in.; Z18 1.085 in. x 0.066 in.; Z19 2.048 x 0.050. ATC (R) chip capacitor: C1, C8, C18, C19: 47 pF, 100B470JW; C27: 8.2 pF, 100A8R2BW; C4, C5, C6, C7: 12 pF, 100B120JW; C3: 1.0 pF, 100B1R0BW; C9, C16, C20: 10 pF, 100B100JW; C2, C17: 8.2 pF, 100B8R2BW. Murata (R) chip capacitor: C12, C23: 0.01 F GRM40X7R103K100AL. 0603 chip capacitor: C10, C21: 220 pF. Sprague (R) tantalum chip capacitor: C14, C25, C26: 22 F, 35 V. Kreger(R) ferrite bead: FB1: 2743D19447. Kemet (R) chip capacitor: C13, C24: 0.10 F C1206C104KRAC7800. Vitramon (R) chip capacitor: C11, C22: 2200 pF, VJ1206Y222KXA. 1206 size 0.25 W, fixed film, chip resistors: R1: 51 , RM73B2B510J; R2: 47 k , RM73B2B473J; R3: 1 k , RM73B2B102J. Taconic(R) ORCER RF-35: board material, 1 oz. copper, 30 mil thickness, r = 3.5. B. Component Layout Figure 2. AGR09030E Test Circuit AGR09030E 30 W, 865 MHz--895 MHz, N-Channel E-Mode, Lateral MOSFET Typical Performance Characteristics 0. 11 0.1 0.4 0.12 0.38 0.13 0.37 0. 14 0. 36 0.15 0.35 0.9 0. 6 60 2 0. 4 0 12 0.7 7 0. 0 65 0. 5 3 0. 4 0 13 0. 44 70 0. 0 5 0. 4 5 75 EN T (+ jX / Z , o) 14 0 O R CA PA CI V TI 0. 06 ES C US EP TA NC E / ( +jB Y o) 0. 2 0.4 0. 0 4 0. 4 6 15 0 EC O M PO N 0. 6 0.0 --> W A V E L E 0.49 N GTH S TOW ARD 0.0 D <-- 0.49 GEN A R D L OA ERA OW 0.48 7 180 HS T .4 TO T 170 R-- -170 EN G V EL 0.47 > WA 160 -90 90 -160 80 TA NC 0. 8 RE AC 1. 0 85 UCT IN D 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.2 1.4 1.6 1.8 Z0 = 8 R E SIST A N C E C OM PON E N T (R / Z o), OR C ON D U C T A N C E C OM PON E N T (G / Y o) 0. 2 0. 1 0.4 ( -jB CE ) / Yo 0.48 0. 6 8 0. -85 AN PT MHz (f) 865 (f1) 880 (f2) 895 (f3) ZL ZS (Complex Source Impedance) (Complex Optimum Load Impedance) 0.618 + j0.290 3.26 + j2.10 0.711 + j0.364 3.39 + j2.47 0.788 + j0.380 3.55 + j2.83 DRAIN (1) ZL SOURCE (3) GATE (2) ZS INPUT MATCH DUT OUTPUT MATCH Figure 3. Series Equivalent Input and Output Impedances 1. 0 0.2 2.0 0 0. 2 f1 ZS f3 0. 6 f1 0.4 0. 8 ZL IV E f3 1. 0 1.4 8 0. 0 0.8 1. 2 55 9 0. 0 1 0. 4 0. 39 100 90 50 80 40 45 1.0 110 70 35 0. 4 0. 3 0.2 0. 1 AGR09030E 30 W, 865 MHz--895 MHz, N-Channel E-Mode, Lateral MOSFET Typical Performance Characteristics (continued) 0 -10 -20 ACPR (dBc)X -30 -40 -50 -60 -70 -80 0 5 FREQUENCY = 880 MHz ACP+ ACPACP1+ ACP1- 10 POUT (W)X 15 20 TEST CONDITIONS: VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 C. IS-95 CDMA PILOT, PAGING, SYNC, TRAFFIC CODES 8--13. OFFSET 1 = 750 kHz, 30 kHz BW. OFFSET 2 = 1.98 MHz, 30 kHz BW. Figure 4. ACPR vs. POUT 23 22 21 20 POWER GAIN (dB)X 0.0 POWER GAIN POUT = 5 W -2.0 -4.0 POUT = 40 W -6.0 -8.0 -10.0 RETURN LOSS -12.0 -14.0 -16.0 -18.0 900 INPUT RETURN LOSS (dB)X 19 18 17 16 15 14 13 12 11 10 860 865 870 875 880 885 FREQUENCY (MHz)X 890 895 TEST CONDITIONS: VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 C, WAVEFORM = CW. Figure 5. Power Gain and Return Loss vs. Frequency AGR09030E 30 W, 865 MHz--895 MHz, N-Channel E-Mode, Lateral MOSFET Typical Performance Characteristics (continued) 24 22 20 POWER GAIN (PG) (dB)X 18 16 14 12 10 8 6 4 2 0 10 20 30 POUT (W)X 40 50 60 865 MHz 880 MHz 895 MHz TEST CONDITIONS: VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 C, WAVEFORM = CW. Figure 6. Power Gain vs. Power Out 65 60 55 50 45 POUT 895 MHz 880 MHz 865 MHz POUT (W)X 40 35 30 25 20 15 10 5 0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 EFFICIENCY 895 MHz 880 MHz 865 MHz 100 95 90 85 80 75 70 65 60 55 50 45 40 35 30 1.7 1.2 1.3 1.4 1.5 1.6 PIN (W)X TEST CONDITIONS: VDD = 28 Vdc, IDQ = 0.33 A, TC = 30 C, WAVEFORM = CW. Figure 7. Power Out and Drain Efficiency vs. Input Power DRAIN EFFICIENCY (%)X AGR09030E 30 W, 865 MHz--895 MHz, N-Channel E-Mode, Lateral MOSFET Package Dimensions All dimensions are in inches. Tolerances are 0.005 in. unless specified. AGR09030EU PINS: 1. DRAIN 2. GATE 3. SOURCE 1 PEAK DEVICES AGR09030EU XXXX 1 3 3 2 2 AGR09030EF PINS: 1. DRAIN 2. GATE 3. SOURCE 1 PEAK DEVICES AGR09030EF XXXX 3 1 3 2 2 XXXX - 4 Digit Trace Code |
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